We are seeking a Senior Verification Engineer to play a key role in developing an innovative and complex SoC chip. This is a unique opportunity to join a fast-growing startup and contribute to the creation of cutting-edge AI computing technology.

Responsibilities:

• Take full ownership of a verification domain, including defining strategy, writing, and executing verification plans in System Verilog UVM.
• Lead the pre-silicon verification of unit-level and full-chip designs.
• Develop and manage verification environments from scratch for SoC projects.
• Collaborate closely with architecture and design teams to ensure seamless chip functionality.

Requirements:

• 7+ years of experience as a Verification Engineer.
• B.Sc./M.Sc. in Electrical or Computer Engineering from a recognized university.
• Extensive experience in pre-silicon functional verification of unit and full-chip designs.
• Proficiency in System Verilog UVM.
• Proven experience in verification of complex SoC designs.
• Familiarity with AMBA protocols, NOC subsystems, or PCIe – an advantage.
• Experience with CPU subsystems – an advantage.

Job #125, המשרה מתאימה לנשים ולגברים כאחד.

Submit your CV here https://tinyurl.com/mwm63ap4